EFFECTIVE DATA RETENTION AND NOISE SUPPRESSION IN MTCMOS CIRCUITS

Multi-threshold CMOS is commonly used for suppressing leakage currents in idle integrated circuits. Power and ground distribution
network noise produced during SLEEP to ACTIVE mode transitions and data presevartion during sleep mode are important
reliability concerns in MTCMOS circuits. Sleep signal slew rate modulation techniques for suppressing mode- ransition noise
along with data retention technology is introduced in this paper. A triple-phase sleep signal slew rate modulation technique with a
novel digital sleep signal generator with data retention mechanism utilising the same sleep signal is proposed. Reactivation time,
mode-transition energy consumption, leakage power consumption, and layout area of different MTCMOS circuits are characterized
under an equal-noise constraint. The proposed triple-phase sleep signal slew rate modulation technique enhances the tolerance to
process parameter fluctuations by up to 183.1× as compared to various alternative MTCMOS noise suppression techniques in a
UMC 80-nm CMOS technology.


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