This paper presents the silicon-proven design of a novel on-chip network to support guaranteed traffic permutation along with a selfcontained
adaptive system for detecting and bypassing permanent errors in multiprocessor system-on-chip applications . The proposed
network employs a pipelined circuit-switching approach combined with a dynamic path-setup scheme under a multistage network
topology. The dynamic path-setup scheme enables runtime path arrangement for arbitrary traffic permutations.The circuit-switching
approach offers a guarantee of permuted data and its compact overhead enables the benefit of stacking multiple networks. The
proposed system reroutes data on erroneous links to a set of spare wires without interrupting the data flow. To detect permanent errors
at runtime, a novel in-line test (ILT) method using spare wires and a test pattern generator is proposed. In addition, an improved
syndrome storing-based detection (SSD) method is presented and compared to the ILT method